# header information: Htutorial_1|8.10 # Views: Vlayout|lay Vschematic|sch # Technologies: Tmocmos|ScaleFORmocmos()D300.0|mocmosAnalog()BT|mocmosNumberOfMetalLayers()I3 # Cell R_divider;1{lay} CR_divider;1{lay}||mocmos|1262482864515|1262540954968||DRC_last_good_drc_area_date()G1262541102782|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1262541102782 Ngeneric:Facet-Center|art@0||0|0||||AV NMetal-1-Pin|pin@1||-98.25|-61.5|||| NMetal-1-Pin|pin@2||-98.25|41|||| Ngeneric:Invisible-Pin|pin@3||2.5|-57|||||SIM_spice_card(D5G10;)S[vin vin 0 DC 1,.tran 0 1] NN-Well-Resistor|resnwell@0||0|0.5|146.5|3|||SCHEM_resistance(D5G10;)S10k NN-Well-Resistor|resnwell@1||0|-34.5|146.5|3|||SCHEM_resistance(D5G10;)S10k AMetal-1|gnd|D5G10;|1|S900|resnwell@1|left|-98.25|-34.5|pin@1||-98.25|-61.5 AMetal-1|vin|D5G10;|1|S2700|resnwell@0|left|-98.25|0.5|pin@2||-98.25|41 AMetal-1|vout|D5G10;|1|S2700|resnwell@1|right|98.25|-34.5|resnwell@0|right|98.25|0.5 X # Cell R_divider;1{sch} CR_divider;1{sch}||schematic|1262476865031|1262493186468| Ngeneric:Facet-Center|art@0||0|0||||AV NWire_Pin|pin@0||3|3|||| NWire_Pin|pin@1||-5|3|||| NWire_Pin|pin@2||3|-4.5|||| Ngeneric:Invisible-Pin|pin@3||-3|0|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 1,.tran 0 1] NResistor|resnwell@0||-0.5|3||||3|ATTR_length(D5G0.25;X-1.5;)D187.5|ATTR_width(D5G0.5;X1.5;)D15.0|SCHEM_resistance(D5G1;)S10k NResistor|resnwell@1||3|0|||R|3|ATTR_length(D5G0.25;X-1.5;)D187.5|ATTR_width(D5G0.5;X1.5;)D15.0|SCHEM_resistance(D5G1;)S10k Awire|gnd|D5G1;||900|resnwell@1|a|3|-2|pin@2||3|-4.5 Awire|net@1|||900|pin@0||3|3|resnwell@1|b|3|2 Awire|vin|D5G1;X-0.5;Y0.5;||0|resnwell@0|a|-2.5|3|pin@1||-5|3 Awire|vout|D5G1;X0.5;Y0.5;||1800|resnwell@0|b|1.5|3|pin@0||3|3 X